Author: Ray Wang, Myron Xie, Dylan Patel, SemiAnalysis

Translation: Shen Chao TechFlow

Shen Chao Introduction: Changxin Memory (CXMT) is about to go public on the Sci-Tech Innovation Board, expected to become the largest semiconductor IPO in China's history. Founded in 2016, the company began with the acquisition of patents and talent from the bankrupt German DRAM manufacturer Qimonda, and after nearly a decade of capital infusion tolerated by the Hefei government, it is projected to turn a profit for the first time in 2025, with single-quarter revenue reaching $7.3 billion in the first quarter of 2026. This extensive research report by SemiAnalysis dissects Changxin's technological path, financial data, HBM challenges, and IPO structure, making it essential reading for understanding China's memory chip industry position.

The SemiAnalysis team described the enormous demand for memory created by AI inference and agent workflows as early as the end of 2024, subsequently publishing several in-depth reports on memory technology while continuously tracking Changxin Memory and China's computing power ecosystem. With Changxin Memory set to go public in the coming months, a dedicated in-depth study is necessary. Changxin is likely to become China's largest semiconductor IPO and a milestone for this leading Chinese memory manufacturer. From this point, the competition between Changxin and Samsung, SK Hynix, and Micron will only intensify.

Silicon Valley Returnees

The founder of Changxin Memory Zhu Yiming graduated with a Bachelor’s degree in Physics from Tsinghua University in 1994, then went on to study Electrical Engineering at Stony Brook University in New York. He worked in Silicon Valley for many years, becoming project leader at MoSys (Monolithic System Technology) around 2001. In 2005, Zhu returned to China with a set of SRAM patents and $100,000 in seed funding to establish GigaDevice, which later became one of the top NOR Flash suppliers globally. However, the global NOR Flash market is much smaller than DRAM or NAND Flash. Zhu's ambitions were greater, and he chose the DRAM path.

DRAM is not a game for fabless companies. DRAM consumes capital, has strict patent barriers, and is highly reliant on manufacturing capability. By 2016, the industry was left with only three survivors: Samsung, SK Hynix, and Micron. The moat built by decades of accumulated patents and capital prevented any new players from breaking through. Zhu's SRAM patents and GigaDevice's NOR Flash business could neither provide DRAM memory cell design nor DRAM processes, nor could they circumvent the patent blockages of the giants. Thus, when Zhu and the Hefei government launched the DRAM project "Project 506" (which would later become Changxin Memory) in 2016, the core technology had to be sourced from external sources.

The source was a defunct German company.

DRAM Foundation: The Qimonda Legacy

The defunct company was Qimonda. Qimonda filed for bankruptcy in January 2009 due to the global financial crisis and the subsequent crash in memory prices, but it was the leading DRAM manufacturer in Europe at the time. As a subsidiary of Infineon, tracing back to Siemens, Qimonda provided a rare alternative: a vast DRAM patent portfolio and a set of memory cell architectures, both sourced outside the Samsung-SK Hynix-Micron triangle.

In June 2015, Canadian patent operating company WiLAN's subsidiary Polaris Innovations purchased approximately 7,000 Qimonda patents and applications from Infineon for about 30 million euros. In December 2019, Polaris signed an agreement with Changxin, licensing a large number of DRAM patents. Changxin executives have stated publicly that they obtained about 2.8 TB of Qimonda technical documentation, which became the foundation of Changxin's DRAM business.

A key technology that Changxin inherited and developed from Qimonda is the 46nm-level BWL (Buried Wordline) memory cell, advancing it to the 10nm level. BWL is a core architectural innovation. Traditional solutions wire the gate of the access transistor along the surface of the wafer, whereas BWL buries the gate in a trench below the bit line. This approach has three benefits: it reduces the memory cell footprint to a 6F² layout (traditional is 8F²), on the premise of not occupying surface area, it extends the channel length to mitigate short-channel leakage (which affects data retention), and it reduces gate-bitline parasitic capacitance. The buried word line coupled with stacked capacitors is the architecture used by today's three major memory giants. At that time, Qimonda, which stuck to trench solutions, just happened to retain the technical reserve of stacking/BWL—and this was what Changxin acquired.

Talent: From Frozen Blueprints to Live R&D Capability

Besides patents, the more enduring asset that Changxin gained from Qimonda's collapse is its engineers. Qimonda established a research and development center in Xi'an with 400-500 engineers, making it one of the largest R&D bases outside Germany. After Qimonda went bankrupt, although the entire Xi'an R&D center was acquired by Tsinghua Unigroup, the broader talent diffusion benefited Changxin.

Changxin also successfully attracted senior engineer Karl-Heinz Kuesters from Qimonda's headquarters in Germany. Kuesters served as Vice President of Technology and Research at Siemens, Infineon, and Qimonda for 24 years. The advanced research production line he led adopted the stacked capacitor solution—which is the architecture that Changxin actually uses. He joined Changxin as a technology consultant, and EE Times described Kuesters as Changxin's "ace." What Kuesters brought is the tacit knowledge that patents and 2.8 TB of documentation cannot provide: his two decades of experience in leading DRAM development allows him to advise Changxin's engineers on which Qimonda designs to retain, which to discard, and how to transition memory cells that work in the lab into mass production. This integration and yield judgment is not found in any patent literature.

The American side follows a similar pattern. Changxin's Vice President responsible for future technology assessment, Ping Er-xuan (the public expositor of the "46nm to 10nm roadmap"), did not come from Qimonda but from Micron, SanDisk, and Applied Materials, with deep experience in the memory and materials technology fields.

Changxin has also recruited a large number of talents from South Korea and Taiwan. The South Korean authorities previously prosecuted former Samsung employees for leaking technology, and reports indicate that dozens of South Korean engineers had previously worked at Changxin. The situation in Taiwan is similar, as Changxin continues to attract top equipment and process engineers with generous salaries.

This is the key to understanding Changxin's trajectory. Qimonda's patents remain a limited and expiring asset. What enables Changxin to advance from G4 to G5 and then to HBM is the capabilities of the gathered talent—locally nurtured talent, returned Chinese engineers with experience in foreign companies, and a small number of foreign experts—rather than just documentation. The legacy was merely a starting point; the talent transformed the external legacy into a self-driven research engine. However, this engine took nearly a decade to become profitable. The question is, who has the patience to continuously provide blood support?

Patience of State-Owned Venture Capital

Changxin’s success is hard to attribute without acknowledging the robust support from local and central Chinese governments. The Hefei municipal government is a classic example. Hefei is a hub for technological innovation in China, and for the past twenty years has incubated successful enterprises through a "patience of state-owned venture capital" model: BOE (global leading display panel manufacturer), NIO (leading electric vehicle manufacturer), and now it's Changxin Memory's turn.

The Hefei municipal government has done two key things for Changxin.

First, it helped Changxin build a local supply chain around the factory. Hefei's strategy is: to hold significant stakes in core "chain master" enterprises, then attract the remaining parts of the industry chain. It did this in the display panel domain with BOE, in the electric vehicle domain with NIO, and since 2016, it has replicated the same script for Changxin. Around Changxin's factory located in the Hefei Airport Economic Zone, the government has created a dense local industrial cluster. Packaging and testing firm Payton and chip packaging service provider XinFeng are just a wall away from Changxin's factory, with over 99% of XinFeng's revenue coming from Changxin. The onsite bulk gas factory operated by Light Steel supplies most of Changxin’s needs, while Zhiwei Semiconductor under Pure Technology provides wafer reclaim capacity in Hefei New Station High-tech Zone. The state-owned venture capital also directly controls upstream chip molding equipment manufacturer Wenyi Technology.

Second, Hefei's state-owned capital is willing to incur losses for a long time. Unlike private equity funds that need to deliver returns to LPs on a schedule, Hefei's state-owned venture capital is ultimately supported by governmental and development zone state-owned entities, with no exit clock. They continuously infuse capital into a company that won't see its first annual profit until 2025, which has accumulated losses of about 36.65 billion RMB over nearly a decade. The "Project 506" initiated in 2016 saw approximately 80% of the funding (14.4 billion/18 billion) from Hefei's state funds in the first phase. Although Hefei's state-owned capital has been diluted in subsequent financing rounds, it has never reduced its stake or exited. By the time of the IPO, the largest shareholder, Hefei Qinghui Jidian, holds 21.67%, and state-owned venture capital holds over 30% in total. Treating the wafer fab as a ten-year bet instead of a fund cycle return—this is the catalyst that technology and talent depend on.

From Legacy to Autonomy

When combined, three threads outline Changxin's first decade clearly. Qimonda provided the foundation: an authorized patent pool and memory cell architecture sourced from outside the giant triangle. Talent provided the momentum: key figures like Kuesters and Ping, along with returning engineers from American giants and controversial talent poached from Korea, turned frozen blueprints into ongoing processes. Then the Hefei government provided the capital, patience, and localized supply chains that the first two could not produce on their own. All three are indispensable.

Next, we will discuss Changxin's finances, technology, and equipment ecosystem.

The Next Step After Ten Years: IPO in the Super Cycle

Changxin's story of the past decade, while impressive, may just be the early chapters of a much longer narrative. The company is preparing for one of China's largest semiconductor IPOs in recent years and may be the most closely watched semiconductor listing globally this year. In December 2025, the Shanghai Stock Exchange officially accepted Changxin's application for listing on the Sci-Tech Innovation Board. Prior to this, there were ongoing market rumors in 2024 and 2025 that the company was preparing for IPO. The latest update is that Changxin submitted an application to the securities regulatory authorities for registration on May 27, and it is currently in the final review stage.

Changxin's IPO prospectus disclosed a wealth of previously inaccessible information. Combined with SemiAnalysis's Memory Model, a more accurate assessment of Changxin's current position and future trends can be made.

At a higher level, according to almost all metrics, Changxin is the fourth largest DRAM manufacturer globally, and it is increasing its lead over second-tier memory manufacturers. In 2025, Changxin's revenue is projected to grow 156% year-on-year to approximately $8.6 billion, compared to roughly $3.3 billion in 2024 and about $1.2 billion in 2023. Its net profit is also expected to turn positive for the first time, reaching $1 billion. Even so, Changxin’s 2025 revenue will still be far below that of Samsung (approximately $72.3 billion), SK Hynix (approximately $52.1 billion), and Micron (approximately $37.2 billion) in DRAM revenue.

Figure: Comparison of Global DRAM Manufacturer Revenues (Source: SemiAnalysis Memory Model)

In the first quarter of 2026, Changxin reported revenue of $7.3 billion, a year-on-year increase of approximately 700%, with quarterly revenue nearing the total for the entire year of 2025. Operating margin also expanded sharply, reaching approximately 70%.

SemiAnalysis believes this is just the beginning. Based solely on the prospectus, the company expects revenue in the first half of 2026 to grow sevenfold year-on-year, exceeding $16 billion. In total for 2026, SemiAnalysis estimates Changxin's revenue could exceed $50 billion. If realized, it would mean that the company's revenue has more than doubled every year since 2023, with a year-on-year growth rate exceeding sixfold in 2026.

This explosive growth driver is less about technology or market share and more about the cycle itself. Looking closely at the data: in the first quarter of 2026, Changxin's bit shipments increased only 11%, but the ASP (average selling price) rose by about 57%, with ASP growth rates of 63% and 68% in the third and fourth quarters of 2025 respectively. It is the explosive price increase, rather than a significant seizure of market share from peers, that is truly driving performance. Based on bit shipments, the SemiAnalysis model shows that Changxin's market share will increase from 9% in 2025 to 12% in 2027. A three percentage point increase in market share seems insignificant, but in a market that SemiAnalysis predicts will approach a trillion dollars in size by 2027, this is monumental.

Figure: Trends in CXMT's ASP and Bit Shipment Changes (Source: SemiAnalysis Memory Model)

Misconceptions about the "Chinese Memory Shock Market"

For readers who have not closely followed Changxin or the memory market, a more interesting discovery is the comparison of Changxin's pricing with industry leaders. Based on data from the Memory Model, Changxin's DRAM ASP challenges a common misconception: Chinese memory is structurally cheaper and will shock the market and depress global prices. While this may have held true in certain past cases, it is not accurate in this cycle.

Taking the first quarter of 2026 as an example, Changxin's DRAM ASP is only about 5-10% lower than that of Samsung, SK Hynix, and Micron. SemiAnalysis expects this situation to remain unchanged throughout 2026, although the gap will gradually widen. The widening arises not from inherent price differences but from changes in product structure. The top manufacturers have a higher percentage of server DRAM and HBM shipments, while the pricing outlook for server DRAM is better than that of consumer-grade DRAM.

By the end of 2027, SemiAnalysis expects server DRAM and HBM to account for over 50% of DRAM end-market demand. As the unit price per GB of server DRAM and HBM is higher, the leading manufacturers will further widen their ASP gap with Changxin, especially considering that HBM prices are expected to rise significantly in 2027.

Figure: Comparison of DRAM Manufacturers' ASP (Source: SemiAnalysis Memory Model)

Profit Margin: A Gift from the Cycle

Strong ASP tailwinds have significantly improved Changxin's profit margins. The gross margin reached 37.8% in 2025, close to Samsung's 39.4% and Micron's 39.8%, but far lower than SK Hynix's 60.4% (which benefits from a higher proportion of HBM shipments). Changxin's approximately 38% gross margin represents a massive leap compared to -113% in 2023 and -4.7% in 2024. 2025 marks not only a historical high for Changxin’s gross margin but also its first positive gross profit.

Figure: Comparison of DRAM Manufacturers' Gross Margin (Source: SemiAnalysis Memory Model, Company Reports)

As 2026 unfolds, profit margins further improve. In the first quarter, the operating margin reached 70%, while SK Hynix was at 73%, Samsung at 81%, and Micron at 84%. Besides ASP growth, Changxin's margin improvement also stems from its nearly exclusive focus on commodity DRAM product structure—under current conditions, the margin of commodity DRAM is actually higher than that of HBM. According to the prospectus, about 99% of the company's bit shipments in 2025 were traditional LPDDR and DDR products, with HBM's contribution to revenue and profit being minimal.

Figure: Comparison of DRAM Manufacturers' Operating Margin (Source: SemiAnalysis Memory Model, Company Reports)

A simple cost analysis of DDR5 units provides a clearer picture. SemiAnalysis found that Changxin’s cost per bit for DDR5 is still over 30% higher than that of the three major giants. However, because DDR5 pricing in the first quarter of 2026 has become very strong, Changxin's gross margin is still pushed up to over 70%. This implies that the improvement of Changxin's profit margin is driven primarily by pricing rather than substantial enhancements in product competitiveness or cost structure.

Figure: Comparison of DDR5 Cost per Bit (Source: SemiAnalysis Memory Model)

Capacity Expansion: Approaching Micron

In addition to record profits, Changxin is also catching up in terms of capacity. By the end of 2026, SemiAnalysis expects Changxin's monthly wafer capacity to reach approximately 350,000 wafers/month, slightly below Micron's approximately 385,000 wafers/month. In terms of wafer capacity rankings, Changxin is likely to become the third-largest memory manufacturer in the industry.

Figure: Comparison of Global DRAM Manufacturers' Monthly Wafer Capacity (Source: SemiAnalysis Memory Model)

However, Changxin still has a significant gap compared to the two giants: Samsung at approximately 720,000 wafers/month and SK Hynix at about 595,000 wafers/month. By 2027, with the initial ramp-up of Shanghai Phase One and full production in Hefei and Beijing, Changxin's capacity could reach approximately 420,000 wafers/month, accounting for about 17% of global DRAM capacity, up from about 13% in 2025. In terms of bit shipments, the market share will increase from 9% in 2025 to 12% in 2027.

By 2028, with full production in Hefei and continued ramp-up at Shanghai Phase II, SemiAnalysis expects Changxin to reach 500,000 wafers/month, accounting for about 17% of global DRAM supply.

Figure: CXMT Hefei Plant Capacity (Source: SemiAnalysis Memory Model)

Concerns about Overcapacity: At Least Two Years Without Fear

Given Changxin's increasingly important role in global DRAM capacity, as in every cycle in the past, investors worry that Chinese manufacturers may cause supply and demand imbalances. SemiAnalysis believes this concern is overstated at least for the next two years. Even taking into account the incremental capacity and bit shipments from Changxin and other memory manufacturers, assuming utilization rates above 90%, DRAM supply remains extremely tight.

Figure: DRAM Supply and Demand Balance (Source: SemiAnalysis Memory Model)

Looking solely at Changxin's capacity expansion pace: in 2026-2028, additional capacities of about 85,000, 70,000, and 80,000 wafers/month are projected, while Samsung's additions are 15,000/50,000/110,000, SK Hynix's are 60,000/60,000/90,000, and Micron's are 30,000/90,000/115,000. Even accounting for these new capacities, DRAM will still be short by a high single-digit percentage in 2026, with the gap expanding to a low to mid double-digit percentage in 2027. SemiAnalysis has previously detailed why DRAM may continue to be in short supply until 2028.

Changxin does not have the capacity to irrationally accelerate capacity expansion beyond the current pace to disrupt the market, as building wafer fabs requires a long cycle. The current extremely favorable pricing environment is precisely the primary driver behind Changxin's explosive performance—Changxin certainly hopes this environment continues. SemiAnalysis has not seen signs of this likelihood in tracking the construction progress of the wafer fabs, but it must be emphasized that the total wafer capacity of the Shanghai site at full production can exceed 400,000 wafers/month.

HBM: Changxin's Dilemma

Regarding HBM, Changxin's allocation of wafers is very limited. By the end of 2025, among Changxin's monthly capacity of about 2.65 million wafers, only about 5,000 are allocated to HBM. SemiAnalysis expects this number to increase to about 30,000 wafers by the end of 2026 and about 55,000 by the end of 2027. This aligns with the prospectus's disclosure that approximately 99% of revenue in 2025 came from DDR and LPDDR.

Figure: CXMT HBM Wafer Capacity Allocation (Source: SemiAnalysis Memory Model)

However, this allocation pattern could change. China’s drive for autonomous and controllable AI computing power could conflict with the company's commercial priorities, and this impetus is expected to strengthen over time. SemiAnalysis has included factors in its forecasts that the government may guide Changxin to tilt capacity toward HBM, expecting HBM capacity to accelerate in 2027 and 2028. It is projected that Changxin's HBM capacity will reach 55,000 wafers/month in 2027 and 100,000 wafers/month in 2028, with its share of global HBM wafer supply increasing from 1% in 2025 to 12% in 2028.

It is essential to remember that Changxin is different from other memory manufacturers; it is not only an economically and technologically important company but also a strategic asset that the nation can utilize to promote priority policy objectives.

From a short-term business logic perspective, it is reasonable for Changxin to prioritize capacity allocation to commodity DRAM rather than HBM. Commodity DRAM currently has significantly higher profit margins than Changxin's HBM products, and the bit output per equivalent wafer area is more than three times that of HBM. Investing heavily in HBM capacity at this immature stage would consume scarce wafer capacity that could be allocated to higher-margin, larger-volume commodity DRAM instead. However, China must advance its HBM layout because HBM sales to China face strict restrictions due to U.S. export controls, and South Korean manufacturers' shipments to China are maintained only through some loopholes.

HBM Technology Gap

In terms of technological readiness, SemiAnalysis believes Changxin is still struggling with the HBM3 8-hi production stability, while 12-hi faces even greater challenges.

On the front end, Changxin has made progress in the **G4 (equivalent to the 1z node)** production stability, and the majority of DRAM output in 2026 will be based on the G4 process. However, the DRAM core chips used for HBM need to achieve higher chip yield rates due to larger die areas and more stringent performance requirements. SemiAnalysis believes that front-end yield remains a significant challenge for Changxin, and the gap with peers remains substantial. Although G4 yield has improved, based on lower profit margins in 2024 and 2025, it is likely still below the industry standard of 85-90% mature yield for the 1z node. This suggests that equipment limitations and manufacturing experience are ongoing barriers that Changxin needs to overcome.

Figure: CXMT DRAM Process Node Roadmap and Yields (Source: SemiAnalysis Memory Model)

The next generation process node, G5 (equivalent to the 1a node), theoretically can continue to advance without relying on EUV lithography machines like Micron's 1a node, but it will face growing manufacturing and design challenges. These challenges will further intensify when applying this node to HBM DRAM dies.

Die stacking is the biggest obstacle for Changxin’s HBM. HBM stacking typically presents serious technical challenges: thermal stress, die cracking, warping, bonding defects, and yield loss in multi-layer stacking. Transitioning from HBM3 8-hi to HBM3 12-hi and even HBM3E brings these issues to the forefront, especially as Changxin still lacks adequate manufacturing experience for HBM at 12-hi and above.

Stacking difficulties are not unique to Changxin. Leading manufacturers also face die cracking, thermal management, and yield loss issues at 12-hi HBM4. The 16-hi and even 20-hi are more challenging—one reason Rubin Ultra expected to use 12-hi HBM4E instead of 16-hi is supply: 16-hi requires more DRAM wafers, is harder to manufacture, has greater wafer losses, and offers fewer effective bits of supply.

SemiAnalysis believes Changxin is increasingly likely to skip HBM3 and focus directly on HBM3E 8-hi and 12-hi for two reasons: first, customers need more competitive HBM products in the 2027 timeframe; second, mainstream accelerators will then feature HBM3E, HBM4, and HBM4E.

Figure: Comparison of Global HBM Roadmaps (Source: SemiAnalysis Memory Model)

On the backend packaging side, although there is still controversy over whether Changxin uses MR-MUF or TC-NCF, the packaging challenges are relatively more controllable, as the company and its testing partners face fewer restrictions under export controls. Changxin has always worked closely with leading OSATs like Tongfu Microelectronics; backend capabilities should gradually improve, although there remains a gap with leading memory manufacturers.

Based on the existing manufacturing challenges, SemiAnalysis models front-end and back-end yields for Changxin's HBM3 8-hi at approximately 35% and 70%, respectively, resulting in a combined yield of only about 25%. HBM3 12-hi or HBM3E 12-hi, due to the stack and bonding challenges being higher, should have even lower combined yields. At this yield level, the same wafer capacity would yield Changxin's HBM output far below that of leading manufacturers. More critically, the output HBM profit margins are extremely low, especially compared to current pricing environments for commodity DRAM.

Changxin's HBM dilemma is also reflected in its product penetration. SemiAnalysis believes that only Huawei, Cambricon, and a few emerging Chinese AI chip startups are likely to adopt Changxin's HBM, although the adoption rate may be high. Domestic AI accelerator manufacturers still prefer to use foreign HBM3 or even HBM3E whenever possible, either through any available channels or from stock built before the December 2024 export controls. As domestic cloud vendors in China rapidly boost capital expenditures and computing power construction, the demand for domestic HBM is also growing swiftly.

Notably, there is one exception: Huawei and Changxin will develop custom HBM that is not based on the JEDEC standard and PHY, which will help compensate for the bandwidth disadvantage.

China's supply constraints for HBM may be more severe than suggested by the slow development of domestic HBM itself. The supply from the three major HBM suppliers is already tight, and, per U.S. export controls as of December 2024, they are restricted from selling HBM2E and more advanced HBM products to China. In a tight supply environment, these manufacturers' willingness to risk violating sales to China is lower.

However, the re-export and smuggling of HBM complicate the situation. SemiAnalysis has learned that some Chinese companies continue to acquire HBM3 through various channels. Using overseas offices or third-country partners for re-exports is still a possible route; some OSATs or intermediaries in third countries are also facilitating such flows. Certain entities export them in the form of unassembled systems or modules (not classified as finished GPUs or ASICs, thus still allowed to export to China), with HBM subsequently disassembled and repackaged onto domestic GPUs or ASICs.

What the IPO Structure Reveals

Changxin may become one of the largest semiconductor IPOs in China, and its equity structure deserves more attention than its financial data. Changxin reported a consolidated net profit of 7.14 billion RMB in 2025, but the net profit attributed to parent company shareholders is only 1.87 billion, with 74% attributable to minority shareholders' equity.

The reason lies in the equity structure. Changxin holds only 30.68% economic rights in Changxin New Bridge and 31.72% economic rights in Changxin Jidian Beijing but controls 73.01% and 75.32% of voting rights through long-term concerted action arrangements, respectively. This allows the company to consolidate its wafer fabs that it does not actually own for the most part, thus overestimating the profit that public shareholders can actually obtain by about fourfold.

Figure: CXMT Consolidated Profit vs. Profit Attributable to Parent Company (Source: SemiAnalysis Memory Model, Company Reports)

The same voting structure also makes the company's statement of "no controlling shareholder, no actual controller" unconvincing (the prospectus lists this as a formal governance risk). Changxin exercises majority voting control over its wafer fabs through concerted action agreements, with the National Integrated Circuit Industry Investment Fund Phase II, Hefei and Anhui state-owned entities collectively holding over 30% after the listing. This arrangement seems designed to manage perceptions of export controls and foreign investors, especially as Changxin's relationship with the Chinese government is under the most scrutiny.

Figure: CXMT Ownership Structure Diagram (Source: SemiAnalysis Memory Model, Company Reports)

Valuation: An Undervalued Bottom Price

Changxin plans to raise 29.5 billion RMB (approximately $4.1 billion), issuing 10-15% of the total share capital post-IPO. Full IPO financing means that with 10% dilution, each share will be about 4.41 RMB, and with 15% dilution, it will be about 2.78 RMB (the financing price in June 2025 was 2.63 RMB). The low-end price has almost no premium compared to the last round, even though it achieved revenue of $7.3 billion and net profit of $4.8 billion in the first quarter of 2026. The price of 2.78 RMB corresponds to an approximate valuation of 197 billion RMB (about $27 billion), which is only 1.8 times the annualized profit attributable to the parent company in the first half of 2026. SemiAnalysis believes this valuation bottom is too low; the actual pricing should be much higher.

Figure: CXMT IPO Valuation Analysis (Source: SemiAnalysis Memory Model, Company Reports)

Use of Funds: Focus on Commodity DRAM, Not Mentioning HBM

The intended use of the 29.5 billion RMB raised reinforces Changxin’s current priorities. Of this, 20.5 billion RMB (69.5%) is allocated for wafer production lines and DRAM technology upgrades, and 9 billion RMB (30.5%) for forward-looking DRAM research. The prospectus does not disclose any specific HBM projects and does not even mention HBM. The description of the projects focuses on upgrading the process platform, product iteration, and transitioning existing production lines to mid-to-high-end DRAM. The core purpose of the IPO is to strengthen Changxin's DRAM manufacturing and technological foundation, with no public financial commitment for recent HBM expansion.

Figure: Distribution of CXMT IPO Fundraising Purpose (Source: SemiAnalysis Memory Model, Company Reports)

A Reminder on Cycle Timing

The magnitude of profit fluctuations serves as a reminder about cycle timing. In the prospectus for December 2025, Changxin anticipated a net loss attributable to the parent company of 600 million to 1.6 billion RMB for the full year of 2025. Five months later, the updated prospectus reported a profit of 1.87 billion, with consolidated profits exceeding previous high estimates by more than double. This also illustrates how quickly top pricing in DRAM can change the valuation denominator—both directions.

Alibaba's Dual Role

A final detail: Alibaba's role in Changxin's shareholder list changes the interpretation of demand-side insights regarding Changxin. Alibaba Cloud is both a core hyperscale customer and a nearly 4% shareholder and endorser, alongside Zhu Yiming's GigaDevice (holding about 1.8%). The domestic demand level is somewhat secured, which is an advantage that Korean giants do not have in their domestic markets. While the percentage is small, its significance is much larger.

Note: The latter part of this article regarding CXMT's equipment ecosystem, export control impacts, and China's storage and computing ambitions is premium content from SemiAnalysis and is not included in this translation.

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