[SK Hynix Releases Next-Generation CPO Roadmap: CPO to Extend to Memory Interfaces] According to reports from the STAR Market Daily, on August 20, SK Hynix, in collaboration with researchers from the University of Virginia and other institutions, published a joint paper in the top-tier scientific journal *Nature Electronics*. The paper systematically outlines the development roadmap for Co-Packaged Optics (CPO) technology in the fields of high-performance computing and AI. This marks the first time SK Hynix has publicly disclosed its AI interconnect architecture's technical blueprint in a journal of this caliber. The article points out that while computing power triples every two years, interconnect bandwidth only increases by a factor of 1.4, making the "bandwidth wall" a core bottleneck for AI scalability. CPO technology is identified as a key breakthrough, with a more ambitious vision of extending CPO to memory interfaces. This would enable multiple AI accelerators to share the same memory pool, thereby improving memory utilization efficiency.